Freescale Semiconductor /MKW21Z4 /SIM /SOPT5

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Interpret as SOPT5

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)LPUART0TXSRC 0 (0)LPUART0RXSRC 0 (0)LPUART0ODE

LPUART0RXSRC=0, LPUART0TXSRC=00, LPUART0ODE=0

Description

System Options Register 5

Fields

LPUART0TXSRC

LPUART0 Transmit Data Source Select

0 (00): LPUART0_TX pin

1 (01): LPUART0_TX pin modulated with TPM1 channel 0 output

2 (10): LPUART0_TX pin modulated with TPM2 channel 0 output

LPUART0RXSRC

LPUART0 Receive Data Source Select

0 (0): LPUART_RX pin

1 (1): CMP0 output

LPUART0ODE

LPUART0 Open Drain Enable

0 (0): Open drain is disabled on LPUART0.

1 (1): Open drain is enabled on LPUART0.

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